Abstract:

The Carry Select Adder (CSLA) is one of the quick adders used in many computer systems for quickly performing mathematical calculations. The employment of mathematical units that are not just quicker but smaller and lower power is required by the quickly growing mobile sector. When creating the enhanced CSLA architecture, the Converter from Binary to Excess-1 (BEC) was utilised. In place of the BEC, this study proposes a useful method that makes use of a D latch. In terms of power, latency and area, experimental study shows that the suggested architecture offers triple benefits

Description:

Low Power, Area Efficient, CSLA, and BEC